Practice
Operating System Memory Management Quiz
Test your understanding of memory management in operating systems with this engaging quiz. Whether you are a student, teacher, or just a memory management enthusiast, this quiz will challenge your knowledge on various topics including paging, TLB, and spinning locks.
- 20 thoughtfully crafted questions
- Covers key concepts in memory management
- Multiple choice, checkboxes, and text-based questions
What are the advantages of paging over segmentation?
Reduces internal fragmentation
Does not need to understand how memory will be used (i.e. Know how heaps and stacks might grow)
Answer, Address translation requires less memory accesses
Free space management is simple due to fixed sized units
Which of the following might be contained in a page table entry?
Answer, Virtual Page Number
Dirty bit
Present bit
Page Frame Number
Protection bit
Correct answer: Accessed bit
Answer, ASID
What are the major issues with using a linear page table without a TLB?
Page tables use a large amount of memory
Answer, Internal fragmentation
Translating an address generates additional memory accesses
Answer, Large CPU overhead when translating an address
Answer, External fragmentation
What is the purpose of the Translation Lookaside Buffer?
Improve context switching performance
Reduce the memory needed for page tables
Allow the OS to maintain control over memory accesses
To speed up address translation by caching page table entries
An address space identifier (ASID) added to the TLB allows for what?
A fully associative cache
Improves TLB hit rate
Avoid flushing the entire cache on a context switch
Preserve address space encapsulation (i.e. process A can't access process B memory)
Suppose we have a LRU page replacement policy with a cache capacity of 4. Determine the number of non-compulsory misses (i.e. Capacity misses) caused by the following page access pattern. 0, 3, 4, 1, 5, 2, 0, 2, 5, 1, 6, 0, 3, 4, 1
Threads within a process share what?
Program counter
Stack
Registers
Critical section
Address space
What does Linux use to deal with thrashing?
admission control
demand paging
Clock algorithm
Out-of-memory killer
clustering
Dirty bit
Suppose we have a simple FIFO page replacement policy with a cache capacity of 4. Determine the number of non-compulsory misses (i.e. Capacity misses) caused by the following page access pattern. 0, 3, 4, 1, 5, 2, 0, 2, 5, 1, 6, 0, 3, 4, 1
Dirty pages are expensive to evict from the page cache. Why?
It hinders spatial locality
The page must be written to disk storage
It causes thrashing
Multiple page entries must be modified
Suppose we have a computer with 1MB RAM and 512-byte pages. Processes use a 64KB virtual address space. Suppose the OS uses linear inverted page tables. If the OS is running 5 processes, what is the total number of page table entries from all the page tables?
Ticket locks are a form of spin lock. Check all the ways in which they are different from the other implementations of spin locks described in Chapter 28.
Answer, Better performance on a single CPU system
Worse performance on a multiple CPU system
Answer, Better performance on a multiple CPU system
Prevents starvation of threads
Worse performance on a single CPU system
Check all hardware instructions that can be used to properly implement a spin lock.
Load-Linked + Store-Conditional
Compare-And-Swap
Test-and-Set
Fetch-And-Add
Load + Store
Check all the situations in which spin locks are effective.
Single CPU system with long critical sections
Multiple CPU system with long critical sections
Single CPU system with short critical sections
Multiple CPU system with short critical sections
One of the earliest solutions to provide mutual exclusion was to disable interrupts on the system. Check all that are true about this approach.
Doesn't provide mutual exclusion on multi CPU systems
Complex implementation
Performs slowly due to high overhead
Poorly behaving programs can deadlock the entire OS
There are 4 conditions that must hold for deadlock to occur in a program. Which of the following is a prevention technique for hold-and-wait?
Add an additional lock
Total ordering of lock acquisition
Redesign code to not use locks
Use trylock instead of lock
What is at the core of any event-based concurrency program?
Continuation
Select()/poll()
Struct aiocb
Signals
Event Loop
Paging
There are 4 conditions that must hold for deadlock to occur in a program. Which of the following is a prevention technique for mutual exclusion?
Total ordering of lock acquisition
Redesign code to not use locks
Add an additional lock
Use trylock instead of lock
There are 4 conditions that must hold for deadlock to occur in a program. Which of the following is a prevention technique for no preemption?
Total ordering of lock acquisition
Use trylock instead of lock
Add an additional lock
Redesign code to not use locks
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